1. Field
This disclosure relates generally to integrated circuit memories, and more specifically, to a circuit for preventing a dummy read in a memory.
2. Related Art
One of the most common ways to reduce power consumption in integrated circuits is to lower the power supply voltage. However, lowering the power supply voltage can cause increased failures and unreliable operation in some circuits. For example, reducing the power supply voltage to a memory array can reduce read margins and cause the memory array to be more susceptible to soft errors and process variations. The problem is made worse as transistor sizes decrease. One the other hand, the lower power supply voltage to the memory array can improve write margins.
In a static random access memory (SRAM) used as a cache memory a problem occurs that is commonly known as a “dummy read”. A “dummy read” in a cache memory causes the internal storage nodes of a memory cell to be exposed to the precharged bit lines. In turn, this leads to the possibility of unintentionally changing the state of the memory cell. To prevent the memory cells from changing states, the stability of the cell may be improved. The problem with improving cell stability to prevent dummy reads is that the memory cell becomes more difficult to write.
Therefore, what is needed is a memory that solves the above problems.